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| OKI Semiconductor MSM51X17400F 4,194,304-Word x 4-Bit DYNAMIC RAM : FAST PAGE MODE TYPE FEDD51X17400F-03 Issue Date: Aug. 16, 2002 DESCRIPTION The MSM51X17400F is a 4,194,304-word x 4-bit dynamic RAM fabricated in Oki's silicon-gate CMOS technology. The MSM51X17400F achieves high integration, high-speed operation, and low-power consumption because Oki manufactures the device in a quadruple-layer polysilicon/double-layer metal CMOS process. The MSM51X17400F is available in a 26/24-pin plastic TSOP. FEATURES * 4,194,304-word x 4-bit configuration * Single 2.0V power supply, 0.15V tolerance * Input : CMOS Interface, low input capacitance * Output : CMOS Interface, 3-state * Refresh : 2048 cycles/32ms * Fast page mode, read modify write capability * CAS before RAS refresh capability * Packages 26/24-pin 300mil plastic TSOP (TSOPII26/24-P-300-1.27-K) (Product : MSM51X17400F-xxTS-K) xx indicates speed rank. PRODUCT FAMILY Access Time (Max.) Family tRAC 100ns tAA 50ns tCAC 20ns tOEA 20ns Cycle Time (Min.) 200ns Power Dissipation Operating (Max.) 200mW Standby (Max.) 1.1mW MSM51X17400F-10 1/13 FEDD51X17400F-03 1 Semiconductor MSM51X17400F PIN CONFIGURATION (TOP VIEW) VCC 1 DQ1 2 DQ2 3 WE 4 RAS 5 NC 6 A10 8 A0 9 A1 10 A2 11 A3 12 VCC 13 26 VSS 25 DQ4 24 DQ3 23 CAS 22 OE 21 A9 19 A8 18 A7 17 A6 16 A5 15 A4 14 VSS 26/24-Pin Plastic TSOP (K Type) Pin Name A0-A10 RAS CAS DQ1-DQ4 OE WE VCC VSS NC Function Address Input Row Address Strobe Column Address Strobe Data Input/Data Output Output Enable Write Enable Power Supply Ground (0V) No Connection Note : The same power supply voltage must be provided to every VCC pin, and the same GND voltage level must be provided to every VSS pin. 2/13 FEDD51X17400F-03 1 Semiconductor MSM51X17400F BLOCK DIAGRAM RAS CAS Timing Generator Timing Generator 11 Column Address Buffers Internal Address Counter Row Address Buffers 11 Column Decoders Write Clock Generator WE OE 4 Output Buffers 4 4 4 Input Buffers 4 A0 - A10 Refresh Control Clock Sense Amplifiers 4 I/O Selector 4 DQ1 - DQ4 11 11 Row Decoders Word Drivers Memory Cells VCC On Chip VBB Generator VSS 3/13 FEDD51X17400F-03 1 Semiconductor MSM51X17400F ELECTRICAL CHARACTERISTICS ABSOLUTE MAXIMUM RATINGS Parameter Voltage on Any Pin Relative to VSS Voltage VCC Supply relative to VSS Short Circuit Output Current Power Dissipation Operating Temperature Storage Temperature Symbol VIN, VOUT VCC IOS PD* Topr Tstg Value -0.5 to VCC+ 0.5 -0.5 to 3.0 50 1 -10 to 70 -55 to 150 Unit V V mA W C C *: Ta = 25C RECOMMENDED OPERATING CONDITIONS (Ta = -10 to 70C) Parameter Power Supply Voltage Input High Voltage Input Low Voltage Symbol VCC VSS VIH VIL Min. 1.85 0 0.8 x VCC -0.2 Typ. 2.0 0 Max. 2.15 0 VCC +0.2 0.2 x VCC Unit V V V V PIN CAPACITANCE (VCC = 2.0V0.15V, Ta = 25C, f = 1 MHz) Parameter Input Capacitance (A0 - A10) Input Capacitance (RAS, CAS, WE, OE) Output Capacitance (DQ1 - DQ4) Symbol CIN1 CIN2 CI/O Min. -- -- -- Max. 5 7 7 Unit pF pF pF 4/13 FEDD51X17400F-03 1 Semiconductor MSM51X17400F DC CHARACTERISTICS (VCC = 2.0V 0.15V, Ta = -10 to 70C) MSM51X17400 F-10 Min. Input High Voltage Input Low Voltage Output High Voltage Output Low Voltage Input Leakage Current VIH VIL VOH VOL ILI IOH = -100A IOL = 100A 0V VI VCC; All other pins not under test = 0V DQ disable 0V VO VCC RAS, CAS cycling, tRC = Min. RAS, CAS = VIH ICC2 RAS, CAS VCC - 0.2V RAS = cycling, CAS before RAS RAS = VIL, ICC7 CAS cycling, tPC = Min. 90 mA 1,3 0.8 x VCC -0.2 0.85 x VCC 0 -10 Max. VCC +0.2 0.2 x VCC VCC 0.15 x VCC 10 V V V V A Parameter Symbol Condition Unit Note Output Leakage Current Average Power Supply Current (Operating) Power Supply Current (Standby) ILO -10 10 A ICC1 90 mA 1,2 2 mA 0.5 1 Average Power Supply Current (CAS before RAS Refresh) Average Power Supply Current (Fast Page Mode) ICC6 90 mA 1,2 Notes: 1. ICC Max. is specified as ICC for output open condition. 2. The address can be changed once or less while RAS = VIL. 3. The address can be changed once or less while CAS = VIH. 5/13 FEDD51X17400F-03 1 Semiconductor MSM51X17400F AC CHARACTERISTICS (1/2) (VCC = 2.0V 0.15V, Ta = -10 to 70C) Note 1,2,3 Parameter Symbol MSM51X17400 F-10 Min. Random Read or Write Cycle Time Fast Page Mode Cycle Time Access Time from RAS Access Time from CAS Access Time from Column Address Access Time from CAS Precharge Access Time from OE Output Low Impedance Time from CAS CAS to Data Output Buffer Turn-off Delay Time OE to Data Output Buffer Turn-off Delay Time Transition Time Refresh Period RAS Precharge Time RAS Pulse Width RAS Pulse Width (Fast Page Mode) RAS Hold Time RAS Hold Time referenced to OE CAS Precharge Time (Fast Page Mode) CAS Pulse Width CAS Hold Time CAS to RAS Precharge Time RAS Hold Time from CAS Precharge tRC tPC tRAC tCAC tAA tCPA tOEA tCLZ tOFF tOEZ tT tREF tRP tRAS tRASP tRSH tROH tCP tCAS tCSH tCRP tRHCP 200 60 0 0 0 3 60 100 100 20 20 15 20 70 10 40 Max. 100 20 50 55 20 25 25 50 32 10,000 100,000 10,000 ns ns ns ns ns ns ns ns ns ns ns ms ns ns ns ns ns ns ns ns ns ns 4, 5, 6 4, 5 4, 6 4 4 4 7 7 3 Unit Note 6/13 FEDD51X17400F-03 1 Semiconductor MSM51X17400F AC CHARACTERISTICS (2/2) (VCC = 2.0V 0.15V, Ta = -10 to 70C) Note 1,2,3 Parameter RAS to CAS Delay Time RAS to Column Address Delay Time Row Address Set-up Time Row Address Hold Time Column Address Set-up Time Column Address Hold Time Column Address to RAS Lead Time Read Command Set-up Time Read Command Hold Time Read Command Hold Time referenced to RAS Write Command Set-up Time Write Command Hold Time Write Command Pulse Width Write Command to RAS Lead Time Write Command to CAS Lead Time Data-in Set-up Time Data-in Hold Time CAS Active Delay Time from RAS Precharge RAS to CAS Set-up Time (CAS before RAS) RAS to CAS Hold Time (CAS before RAS) Symbol MSM51X17400 F-10 Min. tRCD tRAD tASR tRAH tASC tCAH tRAL tRCS tRCH tRRH tWCS tWCH tWP tRWL tCWL tDS tDH tRPC tCSR tCHR 25 20 5 15 5 20 50 5 5 5 5 20 20 20 20 5 20 10 10 15 Max. 80 50 ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns 8 8 5 6 Unit Note 7/13 FEDD51X17400F-03 1 Semiconductor MSM51X17400F Notes: 1. A start-up delay of 200s is required after power-up, followed by a minimum of eight initialization cycles (RAS-only refresh or CAS before RAS refresh) before proper device operation is achieved. 2. The AC characteristics assume tT = 5ns. 3. VIH (Min.) and VIL (Max.) are reference levels for measuring input timing signals. Transition times (tT) are measured between VIH and VIL. 4. This parameter is measured with a load circuit equivalent to 30pF. 5. Operation within the tRCD (Max.) limit ensures that tRAC (Max.) can be met. tRCD (Max.) is specified as a reference point only. If tRCD is greater than the specified tRCD (Max.) limit, then the access time is controlled by tCAC. 6. Operation within the tRAD (Max.) limit ensures that tRAC (Max.) can be met. tRAD (Max.) is specified as a reference point only. If tRAD is greater than the specified tRAD (Max.) limit, then the access time is controlled by tAA. 7. tOFF (Max.) and tOEZ (Max.) define the time at which the output achieved the open circuit condition and are not referenced to output voltage levels. 8. tRCH or tRRH must be satisfied for a read cycle. 8/13 FEDD51X17400F-03 1 Semiconductor MSM51X17400F TIMING CHART Read Cycle RAS VIH VIL tCRP CAS VIH VIL tASR Address VIH VIL VIH VIL VIH VIL tRAC DQ VOH VOL tCLZ Open Valid Data-out "H" or "L" tCAC tOEZ tOFF tAA tROH tOEA OE tRCH tRAD tRAL tRAH tASC Column tRCS tRRH tCAH tRCD tRP tCSH tRSH tCAS tCRP tRC tRAS Row WE Write Cycle (Early Write) VIH VIL tCRP CAS VIH VIL tASR Address VIH VIL tRAD tRAL tRAH tASC tCAH Column tCWL tWCS tWP WE VIH VIL VIH VIL VIH VIL tDS tDH Open "H" or "L" tRWL tWCH tRCD tRC tRAS tRP tCSH tRSH tCAS tCRP RAS Row OE DQ Valid Data-in 9/13 FEDD51X17400F-03 1 Semiconductor MSM51X17400F Fast Page Mode Read Cycle tRASP RAS VIH VIL tCRP CAS VIH VIL tASR Address VIH VIL VIH VIL VIH VIL tRAC tCAC DQ VOH VOL tCLZ tCPA tOFF tOEZ Valid Data-out tRP tPC tRHCP tCP tCAS tRSH tCAS tRAL tRCD tCAS tRAD tCSH tRAH tASC tCAH tCP tCRP tASC tCAH tASC Column tRCH tAA tRCS tCAH Row tRCS Column tRCH tAA tOEA Column tRCS tAA tOEA tRCH WE tOEA tCPA tOFF tOEZ Valid Data-out tRRH OE tCAC tCLZ tCAC tOEZ tCLZ Valid Data-out tOFF "H" or "L" 10/13 FEDD51X17400F-03 1 Semiconductor MSM51X17400F Fast Page Mode Write Cycle (Early Write) tRASP RAS VIH VIL VIH VIL tASR Address VIH VIL Row tRAD tRAH tASC tCSH tCAH tASC tCAH tASC tRAL tCAH Column tRWL tCWL tWCS WE VIH VIL tDS VIH DQ VIL Valid * Data-in tCWL tRP tPC tRHPC tCP tCAS tRSH tCAS tCRP tCRP tRCD tCAS tCP CAS Column Column tCWL tWCS tWCH tWP tWCS tWCH tWP tWP tWCH tDH tDS Valid * Data-in tDH tDS Valid * Data-in tDH Note: OE = "H" or "L" "H" or "L" CAS before RAS Refresh Cycle tRP RAS VIH VIL VIH VIL VIH VIL tOFF DQ VOH VOL Open Note: OE, Address = "H" or "L" "H" or "L" tWRP tWRH tWRP tRPC tCP tCSR tCHR CAS tRAS tRP tRPC tRC WE 11/13 FEDD51X17400F-03 1 Semiconductor MSM51X17400F REVISION HISTORY Document No. FEDD51X17400F-01 FEDD51X17400F-02 FEDD51X17400F-03 Date Aug., 2001 Feb., 2002 Aug, 2002 Page Previous Current Edition Edition - 1, 4, 5, 6, 7 1, 2 - 1, 4, 5, 6, 7 1, 2 Final edition 1 Description Changed VCCmax. from 2.4V to 2.15V Deleted SOJ package 12/13 FEDD51X17400F-03 1 Semiconductor MSM51X17400F NOTICE 1. The information contained herein can change without notice owing to product and/or technical improvements. Before using the product, please make sure that the information being referred to is up-to-date. 2. The outline of action and examples for application circuits described herein have been chosen as an explanation for the standard action and performance of the product. When planning to use the product, please ensure that the external conditions are reflected in the actual circuit, assembly, and program designs. 3. When designing your product, please use our product below the specified maximum ratings and within the specified operating ranges including, but not limited to, operating voltage, power dissipation, and operating temperature. 4. Oki assumes no responsibility or liability whatsoever for any failure or unusual or unexpected operation resulting from misuse, neglect, improper installation, repair, alteration or accident, improper handling, or unusual physical or electrical stress including, but not limited to, exposure to parameters beyond the specified maximum ratings or operation outside the specified operating range. 5. Neither indemnity against nor license of a third party's industrial and intellectual property right, etc. is granted by us in connection with the use of the product and/or the information and drawings contained herein. No responsibility is assumed by us for any infringement of a third party's right which may result from the use thereof. 6. The products listed in this document are intended for use in general electronics equipment for commercial applications (e.g., office automation, communication equipment, measurement equipment, consumer electronics, etc.). These products are not authorized for use in any system or application that requires special or enhanced quality and reliability characteristics nor in any system or application where the failure of such system or application may result in the loss or damage of property, or death or injury to humans. Such applications include, but are not limited to, traffic and automotive equipment, safety devices, aerospace equipment, nuclear power control, medical equipment, and life-support systems. 7. Certain products in this document may need government approval before they can be exported to particular countries. The purchaser assumes the responsibility of determining the legality of export of these products and will take appropriate and necessary steps at their own expense for these. 8. No part of the contents contained herein may be reprinted or reproduced without our prior permission. Copyright 2002 Oki Electric Industry Co., Ltd. 13/13 |
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